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4 fois dans les derniers 239 jours, dernièrement 2020-02-08

define architecture and implement RTL design in accordance with specifications and requirements
collaborates and communicates with management regarding design status, project progress and issue resolution
participation in the execution of the verification plan
Voir plus +9
ensures the designs meet quality, performance, schedule, and cost goals
provide customer level 3 technical support for the implemented design
verification of these modules in unit tests
provide guidance and mentoring to less experienced staff members
provide proper documentation of design architecture and definition, and support for the final product documentation
participation in the definition of functions
content of modules of type state machines, sequencers, communication interfaces
construction of the overall logic block verification plan
virtex 7

experienced profile, autonomy, integrated circuit design, mixed-signal knowledge
master's degree or PHD in Electrical Engineering, Computer engineering or equivalent
10 or more years of experience in ASIC or FPGA design
Voir plus +3
this will be for an initial 6-month contract
RTL description
the candidate will need to build a real-time high-speed interface to capture ADC data